In high-performance computing systems the memory system and the linking structures, i.e. the data buses, over which components communicate, may to a large extent determine the computing capacity of the system. An important performance feature of data buses is the rate at which data signals are transmitted over the data buses between various components. The maximum transmission rate derives from the bus clock frequency, the number of bus clocks per data transfer, and the number of bits transmitted per transfer period. An increase in system performance may therefore be achieved by increasing the bus clock frequency, increasing the number of bits transmitted in each clock interval, or by an increase of the bus width.
It is increasingly important with faster and more complex computing systems that the individual system components and devices are capable of communicating safely and reliably at ever higher frequencies and over increasingly wider data buses.